• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    The electronic device comprises a Wheatstone bridge circuit (PW) and a correction circuit (CC) coupled to the Wheatstone bridge circuit (PW) and configured to correct an offset of the Wheatstone bridge output voltage (PW) . The correction circuit (CC) comprises an input interface (7) for receiving a first voltage, a power supply module (1) configured to supply the Wheatstone bridge circuit (PW) with a second voltage derived from the first voltage and a first current (I1) slaved to the current value of the resistors of the Wheatstone bridge circuit (PW) and develop a second current (12) proportional to the first current (I1), and a digital-to-analog converter (DAC) in current configured to output a correction current to the outputs (2, 3) of the Wheatstone bridge circuit (PW) from a digital correction signal (SNC) and the second current (12).
    公开号:FR3029292A1
    申请号:FR1461773
    申请日:2014-12-02
    公开日:2016-06-03
    发明作者:Thierry Masson；Serge Pontarollo
    申请人:STMicroelectronics Grenoble 2 SAS；
    IPC主号:
    专利说明:

    [0001] Wheatstone Bridge Voltage Shift Correction Device Embodiments of the invention relate to Wheatstone bridge circuits and more specifically to the correction of their offset ("offset") in voltage. The invention applies in particular to Wheatstone bridge sensors intended for measuring, for example, low speed physical phenomena such as: pressure, temperature, gas detection, etc.
    [0002] Wheatstone bridge sensors typically include a Wheatstone bridge circuit and a high impedance preamplifier to amplify the output voltage of the Wheatstone bridge which is proportional to the supply voltage of the Wheatstone bridge.
    [0003] However, the full-scale output voltage of this type of Wheatstone bridge sensor is often very low, for example 10 to 50 mV / V. It then requires high precision pre-amplification before possible digital conversions and offset correction of preamplifier input signals, i.e. Wheatstone bridge output signals. This offset may be the consequence of the mismatching of the Wheatstone bridge resistors or the temperature variation and may be of the same order of magnitude, for example 10 to 30 mV / V, as the full-scale output voltage. Therefore, the Wheatstone bridge output signal shift should be maximized as much as possible. In addition, since the typical bandwidth of low speed physical values is generally 0.1 to 100 Hz, it is desirable to have the lowest noise level possible.
    [0004] According to one embodiment, it is proposed a voltage offset correction device of a Wheatstone bridge, which is independent of the gain of the amplifier chain while ensuring that the offset correction follows the possible variations of the voltage of the Wheatstone bridge as well as possible variations of the resistance values of the Wheatstone bridge in temperature. According to another embodiment, it is proposed an offset correction that is insensitive to the 1 / f noise of the amplifier chain. One possible solution provides for driving the Wheatstone bridge with a current source and a follower amplifier so as to replicate the supply voltage or a voltage derived from this supply voltage, on the Wheatstone bridge itself. to generate a second current proportional to that delivered by the current source and to use this second current as reference current of a digital-to-analog converter in current, and to adjust, for example during a phase of calibration (calibration), the output current of the converter from a digital correction signal so as to cancel as much as possible the voltage shift. Thus, in one aspect, there is provided an electronic device, comprising a Wheatstone bridge circuit and a correction circuit coupled to the Wheatstone bridge circuit and configured to correct an offset of the Wheatstone bridge output voltage. According to a general characteristic of this aspect, the correction circuit comprises an input interface for receiving a first voltage, a power supply module configured to supply the Wheatstone bridge circuit with a second voltage drawn from the first voltage and with a second voltage. first slave current on the current value of the resistors of the Wheatstone bridge circuit and to develop a second current proportional to the first current, and a digital-to-analog converter configured to output a correction current to the outputs of the Wheatstone bridge circuit from a digital correction signal and the second current. The second voltage may be substantially equal to or substantially proportional to the first voltage.
    [0005] The first current is typically inversely proportional to the current value of the resistors of the Wheatstone bridge circuit. Therefore, this first current and enslaved, can follow the possible variation of the resistance of the Wheatstone bridge circuit temperature. Moreover, the digital-analog converter comprises, for example, a first converter input intended to receive the second current, a second converter input intended to receive the digital correction signal and a current differential output coupled to the two outputs of the bridge circuit. Wheatstone to provide said correction current. Since the second current is proportional (the coefficient of proportionality may be equal to 1 or be different from 1) at the first current, it is then also able to follow the possible variation of the resistances of the Wheatstone bridge circuit and this second current serves as the reference current in the digital-to-analog converter. Thus, for a given Wheatstone bridge circuit and temperature, the value of the correction digital signal can be adjusted during a calibration phase to deliver a current differential signal that can cancel the voltage offset at the output of the circuit. Wheatstone bridge. This output current is by nature directly connected to the second current, and therefore indirectly to the first current, the first voltage and the second voltage. The offset correction therefore follows the possible variation of the supply voltage of the Wheatstone bridge and the resistance of the Wheatstone bridge in temperature in particular. Technology imperfections can therefore be corrected automatically and easily, without the use of an advanced, high-cost sensor.
    [0006] In addition, such an electronic device can cancel the offset of the output signals of the Wheatstone bridge before the pre-amplification stage, being insensitive to the gain and noise in 1 / f of the preamplifier.
    [0007] According to one embodiment, the power supply module comprises - a first current source for delivering the first current and driven by a follower amplifier whose input is coupled to the input interface, the output of the first source of power. current being coupled to a power supply terminal of the Wheatstone bridge circuit coupled to the other input of the follower amplifier, and - a second current source for delivering the second current and driven by the follower amplifier, the output the second current source being coupled to the first converter input. The follower amplifier provides a replica of the first voltage at the power supply terminal of the Wheatstone bridge circuit. The first current source may comprise at least a first bipolar transistor whose base is coupled to the output of the follower amplifier and the collector is coupled to the power supply terminal of the Wheatstone bridge circuit, and the second current source can include at least one second bipolar transistor whose base is coupled to the output of the follower amplifier and the collector is coupled to the first converter input. Indeed, the use of bipolar transistors, for example of the PNP type, for current sources makes it possible to intrinsically limit the noise in 1 / f of these current sources and to further improve the performance of the Wheatstone bridge. Alternatively, the power supply module may comprise - at least a first PMOS transistor whose gate is coupled to the output of the follower amplifier and the drain is coupled to said power supply terminal of the Wheatstone bridge circuit through a first hash circuit and the first converter input through a second hash circuit, - at least one second PMOS transistor whose gate is coupled to the output of the follower amplifier and the drain is coupled to said supply terminal of the Wheatstone bridge circuit through a third hash circuit and the first converter input through a fourth hash circuit, and - control means configured to control the hash circuits so that the first source of current alternately comprises said at least one first PMOS transistor or said at least one second PMOS transistor and the second current source comprises alter natively said at least one second PMOS transistor or said at least one first PMOS transistor.
    [0008] The 1 / f noise of the at least one MOS transistor (s) of the first current source looped back onto the follower amplifier is attenuated by the presence of the loop. This is not the case for the transistor (s) MOS which is not in the loop. The presence of the hashing circuits acting as a switch network makes it possible to distribute over time those of the first and second transistors which will be looped back onto the follower amplifier or connected to the first input of the converter, and thus to reduce the noise by 1 / f generated by current sources.
    [0009] Other advantages and features of the invention will be apparent from the detailed description of embodiments, given by way of nonlimiting examples and illustrated by the appended drawings in which: FIGS. 1 to 2 relate to different embodiments of an electronic device according to the invention. Referring now to Figure 1 to illustrate an embodiment of an electronic device DIS according to the invention incorporated for example in a Wheatstone bridge sensor.
    [0010] The electronic device DIS comprises a DC correction circuit and a Wheatstone PW bridge circuit. The DC correction circuit comprises a power supply module 1 and a digital-to-analog converter CNA in current having a differential current output BS1 and B52 coupled with the outputs 2 and 3 of the Wheatstone PW bridge circuit. The power supply module 1 comprises a follower amplifier 4, a first current source 5 comprising a first bipolar transistor PNP 50 and a second current source 6 comprising a second bipolar PNP 60. An input interface 7 is coupled to the non-inverting input of the follower amplifier 4. The bases of the two bipolar transistors 50 and 60 of the two current sources 5 and 6 are coupled together with the output 8 of the follower amplifier 4. The collector of the first bipolar transistor 50 is coupled at a power supply terminal 9 of the Wheatstone bridge circuit PW coupled to the inverting input 10 of the follower amplifier 4. The first converter input EC1 is coupled to the collector of the second bipolar transistor 60 of the second current source 6 The DAC converter receives a digital correction signal SNC via the second converter input EC2. The emitters of transistors 50 and 60 are connected to a supply voltage V DD.
    [0011] The circuit Wheatstone bridge has in this example four resistors R1-R4 theoretically identical and having a resistive value equal to Rpont, connected between the supply terminal 9 and GND ground. When a Wheatstone PW bridge circuit is balanced, there is zero voltage at outputs 2 and 3 of the Wheatstone bridge circuit. Due to technology imperfections, for example the mismatching of the Wheatstone PW resistors, there may be some variation in the resistance value of the Wheatstone PW bridge. As a result, the Wheatstone PW bridge becomes unbalanced and there is a voltage shift at the output of the Wheatstone PW bridge. In a calibration phase performed for example in the factory after the manufacture of the integrated circuit, an offset correction is made to make the Wheatstone PW bridge circuit again balanced. The supply voltage Go of the Wheatstone bridge PW present at the input interface 7 is replicated to the power supply terminal 9 of the Wheatstone bridge circuit PW by the follower amplifier 4. The overall resistance of the Wheatstone bridge Rpont is worth about taking into account technology imperfections and the first current It supplied by the first current source 5 to feed the Wheatstone bridge circuit PW is worth about Rpont.
    [0012] The second current source 6 delivers a second current 12, proportional to the first current I1, to the first converter input EC1 as the reference current. The coefficient of proportionality depends on the dimensional ratio between the transistors 50 and 60.
    [0013] During the calibration phase, the differential current output BS1 and BS2 of the digital-to-analog converter CNA is adjusted to cancel the voltage offset at the output of the Wheatstone bridge by adjusting the value of the received digital correction signal SNC to the second EC2 converter input.
    [0014] Once the Wheatstone bridge is balanced again (zero voltage at Wheatstone bridge circuit outputs 2 and 3), the value of the SNC correction digital signal is frozen and stored for the DAC and will be used in subsequent operation. of the CNA converter.
    [0015] Since the reference current of the digital-to-analog converter CNA is proportional to the first current H, which itself is related to the supply voltage of the circuit of the Wheatstone bridge PW and to the current value of the resistors R1-R4 of the bridge of Wheatstone PW, the differential current output of the DAC converter, configured to cancel the voltage offset at the output of the Wheatstone PW bridge, tracks the potential variation of the supply voltage Vpont and the resistance Rpont of the Wheatstone PW bridge in temperature. .
    [0016] The use of bipolar transistors in the power supply module 1 and possibly in the digital-to-analog converter CNA makes it possible to intrinsically limit the noise in 1 / f of the current sources and possibly the digital-to-analog converter CNA in current.
    [0017] Referring now to Figure 2 to illustrate another embodiment of the electronic device according to the invention. Only the differences between the two embodiments are described below. First, the current sources 5 and 6 use PMOS transistors instead of bipolar transistors in the previous embodiment. In addition, a network of hash circuits 11, commonly designated by those skilled in the art under the acronym "chopper", is added in the feed module 1.
    [0018] The current source 5 comprises a first PMOS transistor 51 whose gate is coupled to the output 8 of the follower amplifier 4 and the drain is coupled to the power supply terminal 9 of the Wheatstone PW circuit circuit through a first circuit H1 and the first input EC1 converter through a second hash circuit H2. In the same way, the current source 6 comprises a second PMOS transistor 61 whose gate is coupled to the output 8 of the follower amplifier 4 and the drain is coupled to the power supply terminal 9 of the Wheatstone PW circuit. through a third hash circuit H3 and the first converter input EC1 through a fourth hash circuit H4. The electronic device DIS further comprises control means MC, made for example from logic circuits or software within a microcontroller, configured to control the hash circuits so that when the hash circuits H1 and H4 are closed, the hash circuits H2 and H3 are open and vice versa. When the hash circuits H1 and H4 are closed, the current source 5 delivers a first current Ii to supply the Wheatstone bridge and the current source 6 delivers a second current 12 to the first converter input EC1 as a reference current. . The current source 5 then forms the first current source and the current source 6 forms the second current source. When the hash circuits H2 and H3 are closed, the first current Ii is then delivered by the current source 6 and the second current 12 is delivered by the current source 5. The current source 6 then forms the first current source and the current source 5 forms the second current source. The 1 / f noise of the MOS transistor of the current source 5 which is looped back to the input 10 of the follower amplifier 4 can be attenuated by the presence of the loop. This is not the case for the MOS transistor that is not in the loop.
    [0019] Also, to limit the noise in 1 / f from the current sources 5 and 6, the control means MC control the hash circuits H1 to H4 to operate alternately as a switch network to distribute over time that of the transistors PMOS which will be looped back on the follower amplifier 4 or connected to the first input of the converter EC1. As a result, the noise in 1 / f of the current sources can be significantly reduced by means of this network of hashing circuits 11. The invention is not limited to the embodiments described above but embraces all variants.
    [0020] Thus the current sources may comprise several transistors in parallel. When the transistors are MOS transistors, it is then possible to add chopping circuits to distribute over time the number of MOS transistors forming the first looped current source and those forming the second current source. Finally, it is possible, for example, to provide a voltage divider or a gain between the inverting input of the amplifier and the supply terminal 9 so as to deliver to the supply terminal 9 a second voltage proportional to the voltage Vont.
    权利要求:
    Claims (6)
    [0001]
    REVENDICATIONS1. An electronic device, comprising a Wheatstone bridge circuit (PW) and a correction circuit (CC) coupled to the Wheatstone bridge circuit (PW) and configured to correct an offset of the Wheatstone bridge output voltage (PW), characterized in that the correction circuit (CC) comprises an input interface (7) for receiving a first voltage, a power supply module (1) configured to supply the Wheatstone bridge circuit (PW) with a second voltage derived from the first voltage and with a first current (I1) slaved to the current value of the resistors of the Wheatstone bridge circuit (PW) and to develop a second current (I2) proportional to the first current (I1), and a digital converter analog logic (CNA) configured to deliver a correction current to the outputs (2, 3) of the Wheatstone bridge circuit (PW) from a digital correction signal (CNS) and the second current (I2).
    [0002]
    2. Device according to claim 1, wherein the second voltage is substantially equal to or substantially proportional to the first voltage.
    [0003]
    3. Device according to claim 1 or 2, wherein the digital-to-analog converter (DAC) current comprises a first converter input (EC1) for receiving the second current (I2), a second converter input (EC2) for receiving the correction digital signal (SNC) and a current differential output (BS1, BS2) coupled to the two outputs (2, 3) of the Wheatstone bridge circuit (PW) for outputting said correction current.
    [0004]
    4. Device according to one of claims 1 to 3, wherein the power supply module (1) comprises a first current source (5) for delivering said first current (I1) and controlled by a follower amplifier (4). an input of which is coupled to said input interface (7), the output of the first current source being coupled to a power supply terminal (9) of the Wheatstone bridge circuit (PW) coupled to the other input ( 10) of the follower amplifier (4), and a second current source (6) for supplying the second current (12) and driven by the follower amplifier (4).
    [0005]
    5. Device according to claims 3 and 4, wherein the first current source (5) comprises at least a first bipolar transistor (50) whose base is coupled to the output (8) of the follower amplifier (4) and the collector is coupled to said power supply terminal (9) of the Wheatstone bridge circuit (PW), and the second power source (6) comprises at least a second bipolar transistor (60) whose base is coupled to the output (8) of the follower amplifier (4) and the collector is coupled to the first converter input (EC1).
    [0006]
    6. Device according to claims 3 and 4, wherein the power supply module comprises at least a first PMOS transistor whose gate is coupled to the output (8) of the follower amplifier (4) and the drain is coupled to said power supply terminal (9) of the Wheatstone bridge circuit (PW) through a first hash circuit (H1) and at the first converter input (EC1) through a second hash circuit (H2), at least one second PMOS transistor whose gate is coupled to the output (8) of the follower amplifier (4) and the drain is coupled to said power supply terminal (9) of the Wheatstone bridge circuit (PW) and looped back on the another input (8) of the follower amplifier (4) through a third hash circuit (H3) and the first converter input (EC1) through a fourth hash circuit (H4), and control means ( MC) configured to control the hash circuits so that the first source of current (5) alternately comprises said at least one first PMOS transistor (51) or said at least one second PMOS transistor (61) and the second current source (6) alternately comprises said at least one PMOS second transistor (61) or said at least one second PMOS transistor (61). minus a first PMOS transistor (51).
    类似技术:
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    法律状态:
    2015-11-23| PLFP| Fee payment|Year of fee payment: 2 |
    2016-06-03| PLSC| Search report ready|Effective date: 20160603 |
    2016-11-21| PLFP| Fee payment|Year of fee payment: 3 |
    2017-11-21| PLFP| Fee payment|Year of fee payment: 4 |
    2019-11-20| PLFP| Fee payment|Year of fee payment: 6 |
    2021-09-10| ST| Notification of lapse|Effective date: 20210806 |
    优先权:
    申请号 | 申请日 | 专利标题
    FR1461773A|FR3029292B1|2014-12-02|2014-12-02|DEVICE FOR CORRECTING THE VOLTAGE OFFSET OF A WHEATSTONE BRIDGE|FR1461773A| FR3029292B1|2014-12-02|2014-12-02|DEVICE FOR CORRECTING THE VOLTAGE OFFSET OF A WHEATSTONE BRIDGE|
    US14/837,556| US10024886B2|2014-12-02|2015-08-27|Device for correcting the voltage offset of a wheatstone bridge|
    DE102015115230.4A| DE102015115230A1|2014-12-02|2015-09-10|Device for correcting the voltage shift of a Wheatstone bridge|
    CN201810982014.6A| CN109101068B|2014-12-02|2015-09-21|Device for correcting the voltage offset of a wheatstone bridge|
    CN201510604167.3A| CN105652938B|2014-12-02|2015-09-21|Equipment for the variation for correcting Wheatstone bridge|
    CN201520733248.9U| CN205175447U|2014-12-02|2015-09-21|Electronic equipment|
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